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Portero, A., A. Scionti, Z. Yu, P. Faraboschi, C. Concatto, L. Carro, A. Garbade, S. Weis, T. Ungerer, and R. Giorgi, "Simulating the Future kilo-x86-64 core Processors and their Infrastructure", Spring Simulation Multiconference (SpringSim), Orlando, Florida, USA, pp. 62-67, 03/2012.
Ho, N., A. Portero, M. Solinas, A. Scionti, A. Mondelli, P. Faraboschi, and R. Giorgi, "Simulating a Multi-core x86_64 Architecture with Hardware ISA Extension Supporting a Data-Flow Execution Model", IEEE 2nd International Conference on Artificial Intelligence, Modeling and Simulation (AIMS), Madrid, Spain, 11/2014.
Giorgi, R., and A. Scionti, "A scalable thread scheduling co-processor based on data-flow principles", Future Generation Computer Systems (FGCS), vol. 53: Elseiver, pp. 100-108, 12/2015.