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2009
Di Carlo, S., P. Prinetto, A. Scionti, J. Figueras, S. Manich, and R. Rodriguez-Montanes, "A Low-Cost FPGA-Based Test and Diagnosis Architecture for SRAMs", IEEE 1st International Conference on Advances in System Testing and Validation Lifecycle (VALID), Porto, Portugal, pp. 141-146, 09/2009.
2008
Di Carlo, S., P. Prinetto, A. Savino, and A. Scionti, "Influence of Parasitic Capacitance Variation on 65 nm and 32 nm Predictive Technology Model SRAM Core-Cells", 17th IEEE Asian Test Sympsosium (ATS), Sapporo, Japan, 11/2008.
Al-Ars, Z., S. Di Carlo, P. Prinetto, and A. Scionti, "Automating Defects Simulation and Fault Modeling for SRAMs", IEEE International High Level Design Validation and Test Workshop (HLDVT), Incline Village, Nevada, USA, 11/2008.
Alemzadeh, H., S. Di Carlo, A. Scionti, P. Prinetto, and Z. Navabi, "Functional Testing Approaches for BIFST-able tlm_fifo", IEEE International High Level Design Validation and Test Workshop (HLDVT), Incline Village, Nevada, USA, 11/2008.
Benso, A., S. Di Carlo, P. Prinetto, A. Savino, and A. Scionti, "Using ER Models for Microprocessor Functional Test Coverage Evaluation", 11th IEEE Baltic Electronic Conference (BEC), Tallinn, Estonia, 2008.

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